An ultra-low power wake up receiver with flip flops based address decoder | IEEE Conference Publication | IEEE Xplore

An ultra-low power wake up receiver with flip flops based address decoder


Abstract:

Energy Efficient Communication is one of the main requirements in the development of wireless sensor networks especially for event triggered applications. These applicati...Show More

Abstract:

Energy Efficient Communication is one of the main requirements in the development of wireless sensor networks especially for event triggered applications. These applications present low data rate and the real time behavior is an issue. Duty cycling scheme is proposed where the node's transceiver is turned off and on regularly in order to listen to the radio channel for possible incoming communication during its on state. Nonetheless, such a paradigm performs poorly for scenarios of low or bursty traffic because of unnecessary activations of the radio transceiver. As an alternative technology, Wake up Radio (WuR) systems present a promising energy efficient network operation, where target devices are only activated in an on demand way by means of a special RF signal. The wakeup receiver is ultra low power receivers which is always on for a continuous idle listening of the channel. It detects the wakeup signal, identifies it, and if the wake up packet corresponds to the requirements, an interruption signal will be sent to the main transceiver to activate it. In this work, we present a novel wake up receiver operating in the 868 MHz Industrial, Scientific and Medical (ISM) frequency band. The proposed wake up receiver consists of an RF front end circuit and a digital code detector for the identification. The RF front end circuit is implemented with passive elements and is triggered by radio energy to minimize power dissipation. It is simulated using Advanced Design Software (ADS) by Agilent. A prototype of the RF front end wakeup receiver is implemented into two layers PCB. Meanwhile, the code detector generates an interrupt signal to the main transceiver based on the received information. Thus, it enables the main transceiver to react to the events instantly. The code detector is based on logic flip flops. It is simulated using ISIS proteus. Detailed descriptions of each block and performance evaluation in term of power consumption and latency have being carried out.
Date of Conference: 16-19 March 2015
Date Added to IEEE Xplore: 07 December 2015
Electronic ISBN:978-1-4799-1758-7
Conference Location: Mahdia, Tunisia

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