Abstract:
In this correspondence we develop a parallel algorithm to compute the all-pairs shortest paths and the diameter of a given graph. Next, this algorithm is mapped into a su...Show MoreMetadata
Abstract:
In this correspondence we develop a parallel algorithm to compute the all-pairs shortest paths and the diameter of a given graph. Next, this algorithm is mapped into a suitable VLSI systolic architecture and the performance of this proposed VLSI implementation is evaluated.
Published in: IEEE Transactions on Computers ( Volume: C-35, Issue: 11, November 1986)
