Loading [MathJax]/extensions/TeX/ietmacros.js
General Timing-Aware Built-In Self-Repair for Die-to-Die Interconnects | IEEE Journals & Magazine | IEEE Xplore

General Timing-Aware Built-In Self-Repair for Die-to-Die Interconnects


Abstract:

A faulty interposer in a 2.5-D integrated circuit often results in a hefty loss as the potentially expensive known-good-dies bonded on the interposer will have to be disc...Show More

Abstract:

A faulty interposer in a 2.5-D integrated circuit often results in a hefty loss as the potentially expensive known-good-dies bonded on the interposer will have to be discarded as well. To avoid such a last-minute loss during a multichip integration process, built-in self-repair (BISR) is highly valuable. Even though there have been many BISR schemes in the literature, the proposed method offers a number of distinct features. First, it can target not only catastrophic faults, but also timing faults. Second, it can be applied to general multi-pin interconnects and it can be applied to repair an interposer with multiple faulty interconnects. Third, it can perform the test-and-then-repair flow on-the-fly, and thereby eliminating the overhead of extra repair storage incurred in previous methods.
Page(s): 1836 - 1846
Date of Publication: 12 May 2015

ISSN Information:

Funding Agency:


References

References is not available for this document.