Abstract:
The high-power dissipation and the low-heat conduction between stacked chips in 3-D structures lead to a high temperature, which has become a critical design constraint f...Show MoreMetadata
Abstract:
The high-power dissipation and the low-heat conduction between stacked chips in 3-D structures lead to a high temperature, which has become a critical design constraint for high-performance 3-D integrated circuits (ICs). Naturally, a power distribution network (PDN) in 3-D ICs consists of good heat conductor, but many existing methods do not fully show its thermal removal capability, and the thermal models of a 3-D PDN are imperfect. In this paper, compact and accurate physically based models to compute effective thermal conductivities of a 3-D PDN are proposed. By combining the equivalent thermal conductivity and the proposed complete thermal models for a 3-D PDN, a fast temperature analysis procedure can be expediently applied using the finite volume method. Finite element method (FEM) tools are used to verify the accuracy of the proposed models, and the errors in the temperature responses of our proposed method are within 3% compared with the results from the FEM. In addition, our method also improves the computational efficiency.
Published in: IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems ( Volume: 38, Issue: 7, July 2019)