Abstract:
Placement and packing are two important but separated optimization steps in a conventional field programmable gate array (FPGA) implementation flow. A packing engine clus...Show MoreMetadata
Abstract:
Placement and packing are two important but separated optimization steps in a conventional field programmable gate array (FPGA) implementation flow. A packing engine clusters logic elements, like lookup tables and flip-flops, into configurable logic blocks, while a placement engine determines their physical locations in FPGA layouts. This paper presents a new paradigm for FPGA placement without an explicit packing stage. In the proposed framework, the solution spaces of placement and packing are simultaneously explored in a smooth and elegant way. Our experiments on ISPD 2016 and 2017 benchmark suites demonstrate the effectiveness of the proposed framework.
Published in: IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems ( Volume: 38, Issue: 11, November 2019)