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VLIW-aware software optimization of AAC decoder on parallel architecture core DSP (PACDSP) processor | IEEE Journals & Magazine | IEEE Xplore

VLIW-aware software optimization of AAC decoder on parallel architecture core DSP (PACDSP) processor


Abstract:

Audio coding is indispensable in our life and MPEG AAC is one of the most popular audio coding standards. It has been widely used in variant applications. In this paper, ...Show More

Abstract:

Audio coding is indispensable in our life and MPEG AAC is one of the most popular audio coding standards. It has been widely used in variant applications. In this paper, we propose VLIW-aware software optimization techniques for the AAC decoding blocks on the parallel architecture core DSP (PACDSP) processor. This approach provides the flexibility for adding new extensions and solves two important issues, low power consumption and limited resources problems on DSP for portable devices. We change the traditional sequential algorithms into parallel processes and minimize the memory utilization of each block. The realized decoder can be operated at a lower frequency of only 15 MHz and needs only 27 Kbytes of program memory and 27 Kbytes of data memory .
Published in: IEEE Transactions on Consumer Electronics ( Volume: 54, Issue: 2, May 2008)
Page(s): 933 - 939
Date of Publication: 15 July 2008

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