A mechanism for the reduction of dynamic energy dissipation based on energy recovery resonant switching in a computing circuit is described. The resonant circuit with controlled switches conserves energy by recovering 90% of energy that would be otherwise lost during logic state transitions. The new approach of incorporating an energy recovery storage capacitor in the resonant circuit helps to initialize the logic operation and moves the energy back and forth to the load capacitance. This energy-conserving approach preserves thermodynamic entropy, ideally preventing heat generation in the system. This proposed method is used for generating an energy-efficient “flat-topped” (quasi-trapezoidal) waveform, which is required to perform the low power digital logic computation, especially for clocking in the system applications.