A regulation scheme to linearize the tuning curve of CMOS ring oscillators is proposed in this paper. The scheme uses the current consumption of the CMOS ring elements, which is proportional to the output frequency to the first order. The design of the feedback loop is presented on system level in conjunction with performance enhancements made on the implementation level. A weakly non-linear ring oscillator model is developed to simplify the control loop design. Model based linearity simulations proof a good agreement with measurements, while the simulation time is significantly reduced. A proof of concept implementation of the proposed linearization technique using CMOS ring oscillators is presented. Operating at 50 MHz sampling frequency, a maximum SFDR of 83.8 dB in a narrow band configuration verifies the effectiveness of the linearization. Implemented in a 180 nm process, the active area of the circuit is only 0.03 mm², which enables the use of this technique for multi-channel, multi-parameter measurement applications.