Power analysis attacks utilize the correlation between the dissipated power and the processed data. Although the instantaneous power dissipation contains information it cannot be exploited without full reverse engineering. This article explores data-dependent instantaneous (intra-cycle) power dissipation and shows that it can be used as additional source of randomness that can be utilized as a barrier against power analysis attacks. Noiseless circuit simulations conducted on 65 nm standard CMOS and standard-cell-based dual-rail SBOXs show that large data-dependent variance in propagation delays enhance the immunity of the circuits.