In this paper, a statistics-based digital background calibration technique for pipelined analog-to-digital converters (ADCs) is presented. This technique employs the residue voltage probability distribution to continuously estimate and digitally eliminate the conversion errors resulted from the residue amplifier gain error and third-order nonlinearity. In order to remove the conversion errors, the proposed method evaluates and corrects the digitized residue probability distribution exploiting a two-level pseudorandom-noise sequence. Behavioral simulation results are provided for a 12-bit pipelined ADC architecture to validate the effectiveness of this scheme. The required number of conversions for convergence is approximately 5 × 106. With calibration, the signal-to-noise and distortion ratio is improved from 49.9 to 70.9 dB.