Video display processing is an indispensable module in a variety of multimedia systems. With the increase of video format to 4K×2K@60fps, the design of efficient display processing circuit faces severe challenges. This paper presents a video display processor which supports a variety of video formats and integrates multiple advanced algorithms for perpetual image quality improvement. By leveraging algorithm and architecture co-design, this paper efficiently implements these computational and memory intensive display processing algorithms in a single chip. In particular, we describe three representative design modules in detail, including motion compensated frame rate upconversion, content-adaptive contrast enhancement, and backlight local dimming. Extensive experiments demonstrate that the proposed design modules outperform the previous works in terms of either image quality or hardware efficiency. The overall chip is fabricated in GF 55nm CMOS technology, and can work at the maximum operating frequency of 594 MHz. The maximum input and output video formats reach up to 4K×2K@60fps.