In recent years, Neural networks (NNs) present vast potential for innovative applications. However, energy efficiency continues to remain a challenge in deploying NNs on the edge. In this context, computation-in-memory (CIM) architecture becomes an emerging trend in the area of energy-efficient hardware design, because it reduces data movement of multiply-accumulate (MAC) computation significantly. However, many recent works employ massive data converters to feed input data and transform output results, which may counteract the benefits of in-memory processing. To tackle this limitation, we propose a combined architecture cooperating sensor with CIM macro to achieve local processing of sensory signals. Current-mode computing techniques are exploited to achieve high energy efficiency while eliminating data conversion overhead. Moreover, we thoroughly analyze the non-idealities of the proposed mixed-signal circuits and present a co-design scheme to mitigate these imperfections. We have fabricated a 2K-bit CIM macro in the proposed architecture with TSMC 65-nm technology. The fabricated chip achieved 60.6 TOPS/W energy efficiency while consuming 845.5 μW power and 0.3 mm² core area, presenting a promising solution for energy-constrained edge devices.