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Analysis and Investigation of Internal AC Frequency to Minimize AC Current Magnitude and Reactive Power Circulation in Chain-Link Modular Multilevel Direct DC–DC Converters | IEEE Journals & Magazine | IEEE Xplore

Analysis and Investigation of Internal AC Frequency to Minimize AC Current Magnitude and Reactive Power Circulation in Chain-Link Modular Multilevel Direct DC–DC Converters


Abstract:

Chain-link modular multilevel direct dc-dc converters (CLMMCs) have attracted much interest recently in for dc power systems because they achieve higher device utilizatio...Show More

Abstract:

Chain-link modular multilevel direct dc-dc converters (CLMMCs) have attracted much interest recently in for dc power systems because they achieve higher device utilization, lower power losses and they are physically more compact than the alternative front-to-front modular multilevel dc-ac-dc converters (FFMMCs). The CLMMCs rely on circulating an internal ac current to manage energy balance of the sub-module (SM) stacks but this current inevitably contributes to extra current stresses for circuit components and can also lead to excess reactive power circulation within the converter. This paper presents a circuit analysis that there exists a frequency value for the internal ac components that may minimize the current stresses and avoid excessive reactive power circulation. For illustration, the circuit analysis is applied to one of the base formats, the buck-boost CLMMC as an example. The key relationship between the CLMMC and the standard dc-ac modular multilevel converter is explored and established. The equivalent circuits for their dc and ac components with consideration of SM capacitance and SM voltage ripples are created and analyzed in detail, and a full derivation is provided for the specific ac frequency. From this example, this analytical method is extended and applied to other base formats of CLMMCs. The theoretical analysis and results are verified by a set of full-scale simulation examples and down-scaled experiments on a laboratory prototype.
Published in: IEEE Transactions on Circuits and Systems I: Regular Papers ( Volume: 67, Issue: 12, December 2020)
Page(s): 5586 - 5599
Date of Publication: 21 July 2020

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