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A Fifth-Order 20-MHz Transistorized-- -Ladder LPF With 58.2-dB SFDR, 68-- Efficiency, and 0.13-- Die Size in 90-nm CMOS | IEEE Journals & Magazine | IEEE Xplore

A Fifth-Order 20-MHz Transistorized-LC -Ladder LPF With 58.2-dB SFDR, 68-\mu\hbox{W/Pole/MHz} Efficiency, and 0.13-\hbox{mm}^{2} Die Size in 90-nm CMOS


Abstract:

A novel transistorized-LC-ladder low-pass filter (LPF) is realized by combining source followers with Q-enhanced floating differential active inductors. It features a...Show More

Abstract:

A novel transistorized-LC-ladder low-pass filter (LPF) is realized by combining source followers with Q-enhanced floating differential active inductors. It features a small number of active devices to minimize the sources of nonlinearity and noise and a robust frequency response against process variations and device mismatches. A fifth-order 20-MHz LPF prototype is fabricated in 90-nm CMOS. It measures a 58.2-dB spurious-free dynamic range with 6.8 mW of power, which corresponds to a selectivity efficiency of 68-\mu \hbox{W}/\hbox{pole}/\hbox{MHz} favorably comparable with the state of the art. The die size is merely 0.13 \hbox{mm}^{2}.
Page(s): 11 - 15
Date of Publication: 10 January 2013

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