A Novel Structure for Rayleigh Channel Generation With Consideration of the Implementation in FPGA | IEEE Journals & Magazine | IEEE Xplore

A Novel Structure for Rayleigh Channel Generation With Consideration of the Implementation in FPGA


Abstract:

For reducing the hardware resource consumption, we propose a novel method of generating Rayleigh channels. First, we propose a basic channel generator built on a recursiv...Show More

Abstract:

For reducing the hardware resource consumption, we propose a novel method of generating Rayleigh channels. First, we propose a basic channel generator built on a recursive structure. Via investigating the dynamic feature of the recursive structure, we find the basic generator is instable. The instability means that errors occurring in the fixed-point computation on field-programmable gate array (FPGA) will be accumulated and thus induce the failure of the channel generation eventually. To solve this problem, we propose an improved Rayleigh channel generator with guaranteed stability. The improved generator manages to preclude the risk of accumulating errors in the fixed-point computation on FPGA. Experiment results show that the memory resources consumed in the proposed generator is one eighth of that in traditional generators, and the accuracy of the generated channel is also guaranteed.
Published in: IEEE Transactions on Circuits and Systems II: Express Briefs ( Volume: 63, Issue: 2, February 2016)
Page(s): 216 - 220
Date of Publication: 28 September 2015

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