Traditional memories use an address to index the stored data. Associative memories rely on a different principle: Part of previously stored data are used to retrieve the remaining part. They are widely used, for instance, in network routers for packet forwarding. A classical way to implement such memories is content-addressable memory (CAM). Since its operation is fully parallel, the response is obtained in a single clock cycle. However, this comes at the cost of energy consumption. This brief proposes to use a recent type of neural networks as a novel way to implement associative memories. Owing to an efficient retrieval algorithm guided by the information being searched, they are a good candidate for low-power associative memory. Compared to the CAM-based system, the analog implementation of 12-kb neuro-inspired memory designed for 65-nm CMOS technology offers 48% energy savings.