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A 21%-Jitter-Improved Self-Aligned Dividerless Injection-Locked PLL With a VCO Control Voltage Ripple-Compensated Phase Detector | IEEE Journals & Magazine | IEEE Xplore

A 21%-Jitter-Improved Self-Aligned Dividerless Injection-Locked PLL With a VCO Control Voltage Ripple-Compensated Phase Detector


Abstract:

This brief presents a 2-GHz dividerless injection-locked phase-locked loop (PLL) (ILPLL) with a voltage-controlled oscillator (VCO) control voltage ripple-compensated pha...Show More

Abstract:

This brief presents a 2-GHz dividerless injection-locked phase-locked loop (PLL) (ILPLL) with a voltage-controlled oscillator (VCO) control voltage ripple-compensated phase detector (PD) (RICPD). The proposed lock detector (LD) can detect not only the frequency difference between VCO frequency and target frequency but also the coarse phase position. With the help of the LD, the RICPD has a simple architecture using AND gates, relieving mismatches in the PD and charge pump. Additionally, the RICPD improves the performance of phase noise by a ripple compensation technique and solves an UP/DN pulse mismatch problem of PLL with a simple structure. As a result, the proposed ILPLL improves jitter performance by 21% (471-fs integrated jitter from 1 kHz to 40 MHz). The test core fabricated in a 65-nm CMOS process consumes 6.2 mW.
Page(s): 733 - 737
Date of Publication: 15 February 2016

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