A fully integrated D-band transceiver front-end with on-chip frequency synthesizer is implemented in 65-nm CMOS. The transceiver front-end adopts the dual-conversion sliding-IF heterodyne architecture to relax the design difficulty of the local oscillation (LO) signal generator. The D-band signal is first down-converted via a 100-GHz LO signal and IQ down-converted via a 50-GHz quadrature LO signal in the receiver (RX). While in the transmitter, the modulated signal is generated at 50 GHz and up-converted via a 100-GHz LO signal. The measured transmitter output power is 2.1 dBm at 150 GHz, with >11 GHz 3-dB bandwidth. The measured results also show the cascaded gain of the RX can be programmed from 57.4 dB to 45.6 dB with 3-dB bandwidth of 9.6 GHz to >20 GHz.