Abstract:
A correlation-based digital background calibration technique to correct the capacitor mismatch error in successive approximation register (SAR) analogue-to-digital conver...Show MoreMetadata
Abstract:
A correlation-based digital background calibration technique to correct the capacitor mismatch error in successive approximation register (SAR) analogue-to-digital converters (ADCs) is proposed. To facilitate the calibration technique, an energy-efficient detect-and-skip (DAS) algorithm is exploited to perform the pseudorandom noise (PN) injection without adding extra hardware overhead. By randomly injecting the error weights and correlating the ADC output with the PN sequence in the digital backend, the real bit weights are identified. In addition, only the error weights are injected into the residue. Therefore, the residue increment caused by the injection is negligible, and the redundancy overhead is minimized. The proposed calibration technique is verified in a 12-bit SAR ADC. Behavioral simulations show that, with calibration, the signal-to-noise and distortion ratio (SNDR) and the spurious-free dynamic range (SFDR) are increased from 55.6 to 71.2 dB and 64.2 to 90.3 dB, respectively.
Published in: IEEE Transactions on Circuits and Systems II: Express Briefs ( Volume: 68, Issue: 4, April 2021)