Processing math: 100%
Efficient VLSI Architecture for Edge-Oriented Demosaicking | IEEE Journals & Magazine | IEEE Xplore

Efficient VLSI Architecture for Edge-Oriented Demosaicking


Abstract:

Color filter array interpolation, also known as demosaicking and “debayering,” is a crucial process for image reconstruction in digital still cameras. This paper presents...Show More

Abstract:

Color filter array interpolation, also known as demosaicking and “debayering,” is a crucial process for image reconstruction in digital still cameras. This paper presents an edge-oriented demosaicking method and an efficient very-large-scale integration (VLSI) architecture for color interpolation. The design uses simple operations (addition, subtraction, shift, and comparator) and nearest neighboring pixels to catch the color difference and edges. The required line buffering of the proposed design is four lines; therefore, its hardware cost is low. Our extensive experiments revealed that the proposed technique preserved edge features and exhibited excellent quantitative evaluation and visual quality performances. Compared with the previous VLSI implementations, the proposed design achieved superior image qualities. The synthesis results revealed that by using Taiwan Semiconductor Manufacturing Company 0.18-\mu \text{m} technology, the proposed design yields a processing rate of approximately 200M samples per second.
Page(s): 2038 - 2047
Date of Publication: 12 April 2017

ISSN Information:


Contact IEEE to Subscribe

References

References is not available for this document.