Nodes in a dominance graph represent faults of a circuit. A directed edge from node f/sub i/ to node f/sub j/ means that fault f/sub j/ dominates f/sub i/. The equivalence of faults f/sub i/ and f/sub j/ is indicated by the presence of simultaneous edges f/sub i/ /spl rarr/ f/sub j/ and f/sub j/ /spl rarr/ f/sub i/. When local dominance and equivalence relations are included in this graph, its transitive closure provides the collapsed fault sets. Pre-collapsed fault sets of standard cells and other logic blocks can be stored in a graph library for hierarchical fault collapsing. Examples show how more compact fault sets are obtained by using functional equivalences that can be found by analysis of small cells. Benchmark circuits c432 and c499 are used to illustrate the use of functional fault collapsing within their exclusive-OR cells.