Abstract:
A novel, on-chip transfer function calibration scheme is introduced to the classical resistor string DAC architecture. A 16-bit, quad channel, resistor string DAC with ex...Show MoreMetadata
Abstract:
A novel, on-chip transfer function calibration scheme is introduced to the classical resistor string DAC architecture. A 16-bit, quad channel, resistor string DAC with exceptional accuracy is fabricated on an ultra-low-cost, 0.5/spl mu/m, 5V CMOS process. Monotonicity is achieved by voltage interpolation and absolute accuracy errors are improved by 100/spl times/ using full transfer function calibration at final test. An on-chip arithmetic logic unit (ALU) linearly interpolates calibration coefficients saving memory, and a high-effective-resolution cal-DAC preserves differential linearity (DNL) performance while correcting integral linearity errors. Separate cal-DACs correct for offset and gain errors. Each DAC channel occupies 4mm/sup 2/ die area, consumes 750/spl mu/A, and settles in 10/spl mu/s, while offering up to +/- 500/spl mu/V absolute accuracy across its transfer curve. The chip has built-in DFT and uses one time programmable memory with read-back. The device can be calibrated and tested with a single insertion at final test. This paper discusses the architecture, testing, calibration and optimization details.
Published in: IEEE International Conference on Test, 2005.
Date of Conference: 08-08 November 2005
Date Added to IEEE Xplore: 06 February 2006
Print ISBN:0-7803-9038-5