Abstract:
This paper describes the design-for-testability (DFT) features and test challenges in a general purpose microprocessor design. An optimized DFT architecture with its impl...Show MoreMetadata
Abstract:
This paper describes the design-for-testability (DFT) features and test challenges in a general purpose microprocessor design. An optimized DFT architecture with its implementation strategies are presented in detail. Major DFT solutions are implemented which can meet high-volume manufacturing (HVM) and high quality test goals.
Published in: 2007 IEEE International Test Conference
Date of Conference: 21-26 October 2007
Date Added to IEEE Xplore: 22 January 2008
ISBN Information:
Contents 