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DFT Implementationis for Striking the Right Balance between Test Cost and Test Quality for Automotive SOCs | IEEE Conference Publication | IEEE Xplore

DFT Implementationis for Striking the Right Balance between Test Cost and Test Quality for Automotive SOCs


Abstract:

Automotive electronics today is characterased by two requirements. One is the well-known aspect of reliability of the components used to build the system. The other is th...Show More

Abstract:

Automotive electronics today is characterased by two requirements. One is the well-known aspect of reliability of the components used to build the system. The other is the increasing need for commoditisation of these systems. These requirements pose the dual challenges of meeting very strict quality goals, while at the same time also adhering to affordable cost goals. Devices designed for one end application often find use in others. Consequently, it is important that these devices be designed and tested in a scaleable manner, wherein the high quality and low cost goals are simultaneously met. In this paper, a case study is presented on a set of recently designed automotive chips at Texas Instruments (India). Illustrations of different techniques are given, together with supporting data. These techniques are generic enough to be adopted and further improvised to enhance test cost and test quality optimisations in a larger class of SOCs as well.
Date of Conference: 28-30 October 2008
Date Added to IEEE Xplore: 10 June 2010
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Conference Location: Santa Clara, CA, USA

References

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