This paper presents a complete on-chip ADC BIST solution based on a segmented stimulus error identification algorithm known as USER-SMILE. By adapting the algorithm for efficient hardware realization, the solution is implemented towards a 1Msps 12-bit SAR ADC on a 28nm CMOS automotive microcontroller. While sufficient test accuracy is demonstrated, the solution is further extended to correct linearity errors of ADC. The entire BIST and calibration circuitry occupies 0.028mm² silicon area while enabling more than 10 times tester time reduction and >10dB THD/SFDR performance improvement over an existing structural capacitor-weight-identification calibration scheme. The added die cost is estimated to be 1/8 of the saved test cost from tester time reduction alone.