This paper characterizes the electrical performance of a probe card that is currently used for the test of memory devices operating at 300 MHz. The large printed circuit board assembly of the probe card has been found to consume 70% of the total signal transmission loss. We propose a simultaneous application of the back-drilling and the equalization techniques that greatly improve the signal integrity (SI) by reduction of the insertion loss and by planarization of the frequency response, respectively. These techniques are very simple and easy to be implemented by the numerical control of the drilling equipment and the surface mount technology. The Δ 3-dB bandwidth has greatly been improved from 0.66 GHz of the conventional probe card to 2.46 GHz after both of the equalization and the back-drilling. We also achieved 53% reductions of the transition times (Tr/Tf) and 51% improvement of the peak-to-peak jitter. We expect the simultaneous application of the back-drilling and the equalization be effectively used for further improvements of current wafer-level probe card performance.