Abstract:
In this paper, we present the design and implementation of a general, flexible, hardware-aware network platform that takes hardware processing behavior into consideration...Show MoreMetadata
Abstract:
In this paper, we present the design and implementation of a general, flexible, hardware-aware network platform that takes hardware processing behavior into consideration to accurately evaluate network performance. The platform adopts a network-hardware co-simulation approach in which the NS-2 network simulator supervises the network-wide traffic flow and the SystemC hardware simulator simulates the underlying hardware processing in network nodes. In addition, as a case study, we implemented wireless all-to-all broadcasting with network coding on the platform. We analyze the hardware processing behavior during the algorithm execution and evaluate the overall performance of the algorithm. Our experimental results demonstrate that hardware processing can have a significant impact on the algorithm performance and hence should be taken into consideration in the algorithm design. We expect that this hardware-aware platform will become a very useful tool for more accurate network simulations and more efficient design space exploration of processing-intensive applications.
Published in: IEEE/ACM Transactions on Networking ( Volume: 21, Issue: 1, February 2013)