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Resistorless electronically tunable grounded inductance simulator design | IEEE Conference Publication | IEEE Xplore

Resistorless electronically tunable grounded inductance simulator design


Abstract:

A new realization of grounded lossless positive inductance simulator (PIS) using simple inverting voltage buffer and unity-gain current follower/inverter (CF±) is reporte...Show More

Abstract:

A new realization of grounded lossless positive inductance simulator (PIS) using simple inverting voltage buffer and unity-gain current follower/inverter (CF±) is reported. Considering the input intrinsic resistance of CF± as useful active parameter, the proposed PIS can be considered as resistorless circuit and it only employs in total 16 Metal-Oxide-Semiconductor (MOS) transistors and a grounded capacitor. The resulting equivalent inductance value of the proposed simulator can be adjusted via change of input intrinsic resistance of CF± by means of its supply voltages. The behavior of the proposed simulator circuit is tested via implementation in voltage-mode 5th-order high-pass filter RLC prototype with Bessel, Butterworth, and Chebyshev I approximation. Theoretical results are verified by SPICE simulations using TSMC 0.18 μm level-7 LO EPI SCN018 CMOS process parameters with ±0.9 V supply voltages.
Date of Conference: 05-07 July 2017
Date Added to IEEE Xplore: 23 October 2017
ISBN Information:
Conference Location: Barcelona, Spain

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