Abstract:
The performance of a tightly coupled on-chip bus connecting several embedded cores can be improved using multithreshold comparators at the receiver end. Reduction in supp...Show MoreMetadata
Abstract:
The performance of a tightly coupled on-chip bus connecting several embedded cores can be improved using multithreshold comparators at the receiver end. Reduction in supply voltage may cause bit errors. An on-chip encoding technique for error correction is proposed to improve the robustness of the method. It relies on a novel algorithmic formulation that exploits the inbuilt redundancy of the multithreshold architecture to reduce the number of redundant bits required to achieve error correction when compared with the existing methods. Extensive experimental evaluation confirms that the overhead of the proposed encoding technique is significantly less than that of the traditional encoding techniques that use a single threshold voltage. Experimental evidence demonstrates that the proposed encoding technique can be implemented on-chip in a scalable nonenumerative manner.
Published in: IEEE Transactions on Very Large Scale Integration (VLSI) Systems ( Volume: 22, Issue: 12, December 2014)