A 12-bit 3.4 MS/s Two-Step Cyclic Time-Domain ADC in 0.18-<inline-formula> <tex-math notation="LaTeX">$\mu \text{m}$ </tex-math></inline-formula> CMOS

A 12-bit 3.4 MS/s Two-Step Cyclic Time-Domain ADC in 0.18-- CMOS | IEEE Journals & Magazine | IEEE Xplore