A switched-capacitor dc-dc voltage regulator that converts an input of 2.4-3.6 V to an output of 30 V has been designed to power display driver integrated circuits. A novel Fibonacci structure, named connect-point-shift, is proposed to improve the current drivability, which increases the minimum current drivability from 0.16 to 0.274 mA. This scheme saves the chip size by approximately 40% while providing equal current drivability as the traditional one. The power efficiency has been improved by 1%-7%, and a peak efficiency of 83.4% has been achieved. The adaptive-conversion-ratio has been adopted for ripple and efficiency improvement. A pulse skip regulator and a linear regulator are utilized to keep the output terminal of the charge pump stable at around 30 V. Their ripple, efficiency, load regulation, and line regulation are compared for further optimization. Theories of Degenerate State and state-space averaging are applied to validate the performance enhancement. This scheme has been fabricated and validated by a 0.11-μm 1.5 V/6 V/30 V process.