Abstract:
This article presents a 4 \times 10 Gb/s low-noise adaptive optical receiver, utilizing a current-reuse architecture and channel crosstalk-remove techniques in 65-nm ...Show MoreMetadata
Abstract:
This article presents a 4 \times 10 Gb/s low-noise adaptive optical receiver, utilizing a current-reuse architecture and channel crosstalk-remove techniques in 65-nm CMOS process. The receiver integrates a transimpedance amplifier (TIA), a continuous-time linear equalizer (EQ), high-gain and high-bandwidth limiting amplifiers, and a 50- \Omega output driver into a single die. The TIA employs a common-source-based pseudo-differential topology with input series inductive peaking and g_{m} -enhancement to improve bandwidth and noise performance. An automatic-gain-control loop scheme is presented which solves the bandwidth variation issue caused by variation of the TIA input impedance, across a large dynamic range of a small input to a maximum overload current. Multiple crosstalk reduction techniques are adopted to improve the channel isolation performance. The 850-nm vertical cavity surface emitting laser (VCSEL)-based full-link measurement results show that the optical receiver achieves 20.4~\mu \text{A}_{\mathrm {pp}} sensitivity bit-error-rate (BER < 1\text{e} -12) with a 200-fF photodiode, competitive with other prior CMOS-based TIAs. The crosstalk over different channels is also measured, demonstrating only a sensitivity penalty of 1 dB.
Published in: IEEE Transactions on Very Large Scale Integration (VLSI) Systems ( Volume: 29, Issue: 12, December 2021)