Abstract:
Over the last couple of years, multiview autostereoscopic displays (MADs) have become commercially available which enable a limited glasses-free 3D experience. The main p...Show MoreMetadata
Abstract:
Over the last couple of years, multiview autostereoscopic displays (MADs) have become commercially available which enable a limited glasses-free 3D experience. The main problem of MADs is that they require several (typically 8 or 9) views, while most of the 3D video content is in stereoscopic 3D (S3D) today. In order to bridge this gap, the research community started to devise automatic multiview synthesis (MVS) methods. These algorithms require real-time processing and should be portable to end-user devices to develop their full potential. In this paper, we present a complete hardware system for fully automatic MVS. We give an overview of the algorithmic flow and corresponding hardware architecture, and provide implementation results of a hybrid FPGA/ASIC prototype - which is the first complete hardware system implementing image-domain-warping-based MVS. The proposed hardware IP could be used as a co-processor in a system-on-chip (SoC) targeting 3D TV sets, thereby enabling efficient content generation in real-time.
Published in: 2015 Visual Communications and Image Processing (VCIP)
Date of Conference: 13-16 December 2015
Date Added to IEEE Xplore: 25 April 2016
ISBN Information: