In this work the authors proposes a new method which uses reduced meta-heuristic versions to generate a set of vector sequences. The method tests the hardest design cases. They focus on the hybrid methods (based on the simulation) since these methods have obtained good results even though there is an increase in digital systems complexity. The strategy employed is based on the use of coverage models for the devices verification process, which are built with relevant conditions or coverage points representing the device under verification (DUV) full behavior. The main problem consists in covering all hard cases since the relationships between the test points and the input data at the design are not trivial. Different to the previous works that used heuristics, the proposed method can reduces the number of evaluations used to obtain test sequences that exercise the coverage points.