A 500MHz blind classification processor for cognitive radios in 40nm CMOS | IEEE Conference Publication | IEEE Xplore

A 500MHz blind classification processor for cognitive radios in 40nm CMOS


Abstract:

A blind classification processor for cognitive radios is realized in 40nm CMOS, featuring three-step parameter estimation for a 59× energy saving compared to an exhaustiv...Show More

Abstract:

A blind classification processor for cognitive radios is realized in 40nm CMOS, featuring three-step parameter estimation for a 59× energy saving compared to an exhaustive method, and multi-algorithm feature extraction to distinguish five modulation classes: multicarrier, single-carrier PSK/QAM/MSK, and spread-spectrum signals. The chip consumes 17µJ within 2ms sensing time per classification, achieving ≥95% detection probability (PD) and ≤0.5% false-alarm rate (PFA) at 10dB SNR in a 500MHz channel.
Date of Conference: 10-13 June 2014
Date Added to IEEE Xplore: 21 July 2014
ISBN Information:

ISSN Information:

Conference Location: Honolulu, HI, USA

Contact IEEE to Subscribe

References

References is not available for this document.