Abstract:
An exponentially-scaling C-2C switched-capacitor ladder is proposed for mm-Wave DCOs to achieve high frequency resolution with small chip area. The 65nm-CMOS DCO prototyp...Show MoreMetadata
Abstract:
An exponentially-scaling C-2C switched-capacitor ladder is proposed for mm-Wave DCOs to achieve high frequency resolution with small chip area. The 65nm-CMOS DCO prototype measures frequency resolution of 4Hz over a frequency range from 54.79 to 63.16GHz with phase noise of -90.7~-94.1dBc/Hz at 1MHz frequency offset while consuming 18mW, corresponding to FOMT from -176.6 to -180 dBc/Hz. The DCO occupies a core area of 0.1 mm2 with only 0.012mm2 for the C-2C switched ladder capacitor.
Published in: 2015 Symposium on VLSI Circuits (VLSI Circuits)
Date of Conference: 17-19 June 2015
Date Added to IEEE Xplore: 03 September 2015
Print ISBN:978-4-86348-502-0
Contents 