Abstract:
This work presents aD-band (114-170GHz) CMOS transceiver (TRX) chipset covering a 56GHz signal-chain bandwidth. An 8-way low-Q power-combined power amplifier (P A), a 2-w...Show MoreMetadata
Abstract:
This work presents aD-band (114-170GHz) CMOS transceiver (TRX) chipset covering a 56GHz signal-chain bandwidth. An 8-way low-Q power-combined power amplifier (P A), a 2-way low-Q power-combined low noise amplifier (LNA), wideband-impedance-transformation mixers, and common-source-based cascaded distributed amplifiers (DA) are proposed to improve bandwidth and linearity. The proposed TRX chipset achieves 200-Gb/s data rate by 32QAM in the single-input single-output (SISO) over-the-air (OTA) measurement. A 120-Gb/s data rate by 16QAM is realized with a 15m distance. A 640-Gb /\mathrm{s} \ 4\times 4 multi-input multi-output (MIMO) is also demonstrated in this work.
Date of Conference: 16-20 June 2024
Date Added to IEEE Xplore: 26 August 2024
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