Abstract:
We present a new automatic test configuration generation technique for manufacturing testing of interconnect network of SRAM-based FPGA architectures. The technique guara...Show MoreMetadata
Abstract:
We present a new automatic test configuration generation technique for manufacturing testing of interconnect network of SRAM-based FPGA architectures. The technique guarantees detection of open and bridging faults in all wiring channels and programmable switches in the interconnects. Only 8 test configurations are required to achieve 100% coverage of stuck-open, stuck-closed, open and bridging faults in the interconnects of Xilinx Virtex FPGAs.
Published in: Proceedings. 21st VLSI Test Symposium, 2003.
Date of Conference: 01-01 May 2003
Date Added to IEEE Xplore: 07 May 2003
Print ISBN:0-7695-1924-5
Print ISSN: 1093-0167
Contents 