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FPGA implementation of MMSE metric based efficient near-ML detection | IEEE Conference Publication | IEEE Xplore

FPGA implementation of MMSE metric based efficient near-ML detection


Abstract:

We consider the problem of detecting a vector signal transmitted over a multiple input-multiple output (MIMO) channel. A number of suboptimal detectors have been proposed...Show More

Abstract:

We consider the problem of detecting a vector signal transmitted over a multiple input-multiple output (MIMO) channel. A number of suboptimal detectors have been proposed to solve that problem, given that maximum likelihood (ML) detection is NP-hard. After reviewing the main concepts of the ML and the minimum mean square error (MMSE) metrics, we introduce an unbiased MMSE metric that can be applied to existing MIMO detectors in order to improve their performance. Applying the biased and unbiased MMSE metrics together with a real-valued representation of the system, the performance and complexity of a number suboptimal MIMO detectors is compared in this paper, showing how the QR decomposition-M (QRD-M) can be used to approximate ML performance with low complexity. In order to further validate those results, the QRD-M algorithm has been implemented on a field-programmable gate array (FPGA) platform, showing an excellent fixed-point performance under real-time conditions. Finally, the resulting real-time detector has been compared to state-of-the-art detectors previously implemented, in terms of complexity, error performance and throughput.
Date of Conference: 26-27 February 2008
Date Added to IEEE Xplore: 21 March 2008
ISBN Information:
Conference Location: Darmstadt, Germany

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