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Fast Parallel Weighted Bit Flipping decoding algorithm for LDPC codes | IEEE Conference Publication | IEEE Xplore

Fast Parallel Weighted Bit Flipping decoding algorithm for LDPC codes


Abstract:

In this paper a fast version of the parallel weighted bit flipping LDPC decoding algorithm (PWBF) is presented. The idea, which allowed decreasing the computational compl...Show More

Abstract:

In this paper a fast version of the parallel weighted bit flipping LDPC decoding algorithm (PWBF) is presented. The idea, which allowed decreasing the computational complexity of the PWBF method, is based on the observation that in dependency on signal to noise ratio, many of the received bits in the codeword of LDPC code could be without error. The augmented algorithm makes tests based on syndromes and symbol involvement in parity checks, which are given by the factor graph corresponding to the chosen LDPC code in order to define so called guaranteed bits. These guaranteed bits do not participate in the decoding calculations further. Simulation results are presented, which show that there is not visible any significant performance deterioration by application of this method and that the approximate speed up of the decoding for the tested codes is about 25% on the selected hardware in comparison with the known PWBF.
Date of Conference: 22-24 April 2009
Date Added to IEEE Xplore: 05 June 2009
ISBN Information:
Print ISSN: 1934-5070
Conference Location: Prague, Czech Republic

References

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