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Performance pathologies in hardware transactional memory

Published:09 June 2007Publication History

ABSTRACT

Hardware Transactional Memory (HTM) systems reflect choices from three key design dimensions: conflict detection, version management, and conflict resolution. Previously proposed HTMs represent three points in this design space: lazy conflict detection, lazy version management, committer wins (LL); eager conflict detection, lazy version management, requester wins (EL); and eager conflict detection, eager version management, and requester stalls with conservative deadlock avoidance (EE). To isolate the effects of these high-level design decisions, we develop a common framework that abstracts away differences in cache write policies, interconnects, and ISA to compare these three design points. Not surprisingly, the relative performance of these systems depends on the workload. Under light transactional loads they perform similarly, but under heavy loads they differ by up to 80%. None of the systems performs best on all of our benchmarks. We identify seven performance pathologies-interactions between workload and system that degrade performance-as the root cause of many performance differences: FriendlyFire, StarvingWriter, SerializedCommit, FutileStall, StarvingElder, RestartConvoy, and DuelingUpgrades. We discuss when and on which systems these pathologies can occur and show that they actually manifest within TM workloads. The insight provided by these pathologies motivated four enhanced systems that often significantly reduce transactional memory overhead. Importantly, by avoiding transaction pathologies, each enhanced system performs well across our suite of benchmarks.

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      • Published in

        cover image ACM Conferences
        ISCA '07: Proceedings of the 34th annual international symposium on Computer architecture
        June 2007
        542 pages
        ISBN:9781595937063
        DOI:10.1145/1250662
        • General Chair:
        • Dean Tullsen,
        • Program Chair:
        • Brad Calder
        • cover image ACM SIGARCH Computer Architecture News
          ACM SIGARCH Computer Architecture News  Volume 35, Issue 2
          May 2007
          527 pages
          ISSN:0163-5964
          DOI:10.1145/1273440
          Issue’s Table of Contents

        Copyright © 2007 ACM

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        Publication History

        • Published: 9 June 2007

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