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Mapping streaming architectures on reconfigurable platforms

Published:01 June 2007Publication History
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Abstract

Hardware accelerators, used as application-specific extensions to the computational capabilities of a system, are efficient mechanisms to enhance the performance and reduce the power dissipation in a System On Chip (SoC). These accelerators execute on the computationally critical part of the application, and offload computations from the scalar processors. In this paper, we present a design automation tool that generates accelerators based on a given application kernel. The accelerators are processing streaming data, and support a programming model which can naturally express a large number of embedded applications, and which results in efficient and fast hardware implementations. We demonstrate the applicability of the tool for architectural space exploration for a number of media applications, with results on area, throughput, and clock speeds.

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              cover image ACM SIGARCH Computer Architecture News
              ACM SIGARCH Computer Architecture News  Volume 35, Issue 3
              Special issue on the 2006 reconfigurable and adaptive architecture workshop
              June 2007
              55 pages
              ISSN:0163-5964
              DOI:10.1145/1294313
              Issue’s Table of Contents

              Copyright © 2007 Authors

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              Association for Computing Machinery

              New York, NY, United States

              Publication History

              • Published: 1 June 2007

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