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Peak power control algorithm for multi-processor SoC

Published:15 February 2009Publication History

ABSTRACT

The present study proposes subtask scheduling for lowering average power and preventing peak power violation in multi-core structure. The proposed algorithm is composed of the partitioning step that divides a task into subtasks using the moving average of power consumption and defines patterns through curve fitting, and the scheduling step that allocates the subtasks to cores and applies dynamic voltage and frequency scaling (DVFS). According to the results of experiment, the algorithm decreased the frequency of peak power by up to around 73% and average power consumption by up to around 18% compared to existing algorithms.

References

  1. Byungyu Ahn, SungHwan Park, and Jongwha Chong, "Subtask Priority Scheduling for Multiprocessor under Peak Power Constraint," The 21st Workshop on Circuits and Systems in K aruizawa, April 2008.Google ScholarGoogle Scholar
  2. Xizhou Feng, "Power and Energy Profiling of Scientific Applications on Distributed Systems," Proc. of Parallel and Dist ributed Processing Symposium, 2005. 19th IEEE, pp.34--44, April 2005. Google ScholarGoogle ScholarDigital LibraryDigital Library
  3. Rodney M. LaFollette, "Design and Performance of High Specific Power, Pulsed Discharge, Bipolar Lead Acid Batteries, "10th Annual Battery Conference on Applications and Advances, Long Beach, pp. 43--47, January 1995.Google ScholarGoogle Scholar
  4. Dennis G. Zill, Michael R. Cullen, "FUNDAMENTALS of EXECTRIC ANALYSIS," Jone WILEY, 2001.Google ScholarGoogle Scholar
  5. Matthew R. Guthaus, "MiBench: A free, commercially representative embedded benchmark suite," 2001 IEEE International Workshop on Workload Characterization, pp.3--14, Dec 2001. Google ScholarGoogle ScholarDigital LibraryDigital Library
  6. Chung-Hsing Hsu, U. Kremer, and M. Hsiao, "Compiler-Directed Dynamic Voltage/Frequency Scheduling for Energy Reduction in Microprocessors," Low Power Electronics and Design, International Symposium on, 2001. Pages 275--278, August 2001. Google ScholarGoogle ScholarDigital LibraryDigital Library
  7. Gary Chartrand, and Ortrud R. Oellermann, "Applied and Algorithmic Graph Theory," Mcgraw-Hill College, July 1, 1992Google ScholarGoogle Scholar

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  • Published in

    cover image ACM Conferences
    ICUIMC '09: Proceedings of the 3rd International Conference on Ubiquitous Information Management and Communication
    February 2009
    704 pages
    ISBN:9781605584058
    DOI:10.1145/1516241

    Copyright © 2009 ACM

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    Association for Computing Machinery

    New York, NY, United States

    Publication History

    • Published: 15 February 2009

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