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A gridless routing system with nonslicing floorplanning-based crosstalk reduction on gridless track assignment

Published:07 April 2011Publication History
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Abstract

Track assignment, which is an intermediate stage between global routing and detailed routing, provides a good platform for promoting performance, and for imposing additional constraints during routing, such as crosstalk. Gridless track assignment (GTA) has not been addressed in public literature. This work develops a gridless routing system integrating a congestion-driven global router, crosstalk-driven GTA and an enhanced implicit connection-graph-based router. Initial assignment is produced rapidly with a left-edge like algorithm. Crosstalk reduction on the assignment is then transformed to a restricted nonslicing floorplanning problem, and a deterministic O-Tree based algorithm is employed to reassign each net segment. Finally, each panel is partitioned into several subpanels, and the subpanels are reordered using branch and bound algorithm to decrease the crosstalk further. Before detailed routing, routing tree construction is undertaken for placed IRoutes and other pins; many original point-to-point routings are set to connect to IRoutes, and can be accomplished simply with pattern routing. For detailed routing, this work proposes a rapid extraction method for pseudomaximum stripped tiles to boost path propagation. Experimental results demonstrate that the proposed gridless routing system has over 2.02 times the runtime speedup in average for fixed- and variable-rule routings of an implicit connection-graph-based router, NEMO. As compared with a commercial routing tool, this work yields an average reduction rate of 13.8% in coupling capacitance calculated using its built-in coupling capacitance estimator.

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  1. A gridless routing system with nonslicing floorplanning-based crosstalk reduction on gridless track assignment

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        cover image ACM Transactions on Design Automation of Electronic Systems
        ACM Transactions on Design Automation of Electronic Systems  Volume 16, Issue 2
        March 2011
        180 pages
        ISSN:1084-4309
        EISSN:1557-7309
        DOI:10.1145/1929943
        Issue’s Table of Contents

        Copyright © 2011 ACM

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        Publication History

        • Published: 7 April 2011
        • Accepted: 1 July 2010
        • Revised: 1 September 2009
        • Received: 1 March 2009
        Published in todaes Volume 16, Issue 2

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