Freek Verbeek
ABSTRACT
Wormhole switching is a switching technique nowadays commonly used in networks-on-chips (NoCs). It is efficient but prone to deadlock. The design of a deadlock-free adaptive routing function constitutes an important challenge. We present a novel algorithm for the automatic verification that a routing function is deadlock-free in wormhole networks. A sufficient condition for deadlock-free routing and an associated algorithm are defined. The algorithm is proven complete for the condition. The condition, the algorithm, and the correctness theorem have been formalized and checked in the logic of the ACL2 interactive theorem proving system. The algorithm has a time complexity in O(N3), where N denotes the number of nodes in the network. This outperforms the previous solution of Taktak et al. by one degree. Experimental results confirm the high efficiency of our algorithm. This paper presents a formally proven correct algorithm that detects deadlocks in a 2D-mesh with about 4000 nodes and 15000 channels within seconds.
- L. Benini and G. D. Micheli. Networks on Chips: A New SoC Paradigm. Computer, 35(1):70--78, 2002. Google Scholar
Digital Library
- E. Bolotin, I. Cidon, R. Ginosar, and A. Kolodny. Qnoc: Qos architecture and design process for network on chip. Journal of Systems Architecture, 50(2--3):105--128, 2004. Google ScholarDigital Library
- M. Coppola, S. Curaba, M. Grammatikakis, G. Maruccia, and F. Papariello. OCCN: A network-on-chip modeling and simulation framework. In DATE, pages 174--179, 2004. Google ScholarDigital Library
- M. Coppola, M. Grammatikakis, R. Locatelli, G. Mariuccia, and L. Pieralisi. Design of interconnect processing units Spidergon STNoC. CRC Press, 2009. Google ScholarDigital Library
- W. J. Dally and B. Towles. Route packets, not wires: on-chip interconnection networks. In Proceedings of the Design Automation Conference, pages 684--689, Las Vegas, NV, 2001. Google ScholarDigital Library
- J. Duato. A necessary and sufficient condition for deadlock-free adaptive routing in wormhole networks. IEEE Transactions on Parallel and Distributed Systems, 6(10):1055--1067, 1995. Google ScholarDigital Library
- J. Duato, S. Yalamanchili, and N. Lionel. Interconnection Networks: An Engineering Approach. Morgan Kaufmann Publishers Inc., San Francisco, CA, USA, 2002. Google ScholarDigital Library
- E. Fleury and P. Fraigniaud. A general theory for deadlock avoidance in wormhole-routed networks. IEEE Transactions on Parallel and Distributed Systems, 9(7):626--638, 1998. Google ScholarDigital Library
- C. J. Glass and L. M. Ni. The turn model for adaptive routing. Journal of the ACM, 41(5):874--902, 1994. Google ScholarDigital Library
- K. Goossens, J. Dielissen, and A. Rădulescu. The Æthereal network on chip: Concepts, architectures, and implementations. IEEE Design and Test of Computers, 22(5):21--31, Sept.-Oct. 2005. Google ScholarDigital Library
- F. Karim, A. Nguyen, and S. Dey. An interconnect architecture for networking systems on chips. IEEE Micro, 22(5):36--45, 2002. Google ScholarDigital Library
- M. Kaufmann, P. Manolios, and J. S. Moore. ACL2 Computer-Aided Reasoning: An Approach, 2000. Google ScholarDigital Library
- G. D. Micheli and L. Benini. Networks on Chips: Technology and Tools (Systems on Silicon). Morgan Kaufmann Publishers Inc., San Francisco, CA, USA, 2006. Google ScholarDigital Library
- F. Moraes, N. Calazans, A. Mello, L. Möller, and L. Ost. Hermes: an infrastructure for low area overhead packet-switching networks on chip. Integration, the VLSI Journal, 38(1):69--93, 2004. Google ScholarDigital Library
- L. Ni and P. McKinley. A survey of wormhole routing techniques in direct networks. IEEE Computer, 26:62--76, 1993. Google ScholarDigital Library
- L. Schwiebert and D. N. Jayasimha. A universal proof technique for deadlock-free routing in interconnection networks. In In 7th Annual ACM Symposium on Parallel Algorithms and Architectures, pages 175--184, 1995. Google ScholarDigital Library
- S. Taktak, J.-L. Desbarbieux, and E. Encrenaz. A tool for automatic detection of deadlock in wormhole networks on chip. ACM Transactions on Design Automation of Electronic Systems, 13(1), January 2008. Google ScholarDigital Library
- S. Taktak, E. Encrenaz, and J.-L. Desbarbieux. A polynomial algorithm to prove deadlock-freeness of wormhole networks. In 18th Euromicro International Conference on Parallel, Distributed and Network-Based Computing (PDP'10), February 2010. Google ScholarDigital Library
- F. Verbeek. A fast and verified algorithm for proving store-and-forward networks deadlock-free. In Proceedings of the 19th International Euromicro Conference on Parallel, Distributed and Network-based Processing (PDP), 2011. Google ScholarDigital Library
- F. Verbeek and J. Schmaltz. A comment on "a necessary and sufficient condition for deadlock-free adaptive routing in wormhole networks". IEEE Transactions on Parallel and Distributed Systems, 99(PrePrints), 2011. Google ScholarDigital Library
- F. Verbeek and J. Schmaltz. On necessary and sufficient conditions for deadlock-free routing in wormhole networks. IEEE Transactions on Parallel and Distributed Systems, 99(PrePrints), 2011. Google ScholarDigital Library
Index Terms
- Automatic verification for deadlock in Networks-on-Chips with adaptive routing and wormhole switching
Recommendations
A Comparison of Router Architectures for Virtual Cut-Through and Wormhole Switching in a NOW Environment
Most multicomputer interconnection networks use wormhole switching, leading to fast and compact routers. Current routers incorporate virtual channels and even fully adaptive routing. Networks of workstations (NOWs) inherited multicomputer technology. ...
A Theory of Deadlock-Free Adaptive Multicast Routing in Wormhole Networks
A theory for the design of deadlock-free adaptive routing algorithms for wormhole networks was proposed in [12], [16]. This theory supplies the sufficient conditions for an adaptive routing algorithm to be deadlock-free, even when there are cyclic ...
An Efficient Adaptive Deadlock-Free Routing Algorithm for Torus Networks
A deadlock-free minimal routing algorithm called clue is first proposed for VCT (virtual cut-through)-switched tori. Only two virtual channels are required. One channel is applied in the deadlock-free routing algorithm for the mesh subnetwork based on a ...
Comments