ABSTRACT
Power gating is essential for controlling leakage power dissipation of modern chip designs. However, power gating introduces unique power delivery integrity issues and tradeoffs between switching and rush current (wake-up) supply noises. In addition, in power-gated power delivery networks (PDNs), the amount of power saving intrinsically trades off with power integrity. In this paper, we propose systemic decoupling capacitance optimization strategies that optimally balance between switching and rush current noises, and tradeoff between power integrity and wake-up time, hence power saving. Furthermore, we propose a novel re-routable decoupling capacitance concept to break the tight interaction between power integrity and power saving, providing further improved tradeoffs between the two. Our design strategies have been implemented in a simulation-based optimization flow and the conducted experimental results have demonstrated significant improvement on leakage power saving through the presented techniques.
- The international technlogy roadmap for semiconductors (itrs) 2009 edition. http://public.itrs.net/, 2009.Google Scholar
- Haihua Su, S. S. Sapatnekar, and S. R. Nassif. Optimal decoupling capacitor sizing and placement for standard-cell layout designs. 22(4):428--436, 2003. Google ScholarDigital Library
- Shiyou Zhao, K. Roy, and Cheng-Kok Koh. Decoupling capacitance allocation and its application to power-supply noise-aware floorplanning. 21(1):81--92, 2002. Google ScholarDigital Library
- Hailin Jiang, M. Marek-Sadowska, and S. R. Nassif. Benefits and costs of power-gating technique. In Proc. IEEE Int. Conf. Computer Design: VLSI in Computers and Processors ICCD 2005, pages 559--566, 2005. Google ScholarDigital Library
- K. Agarwal, H. Deogun, D. Sylvester, and K. Nowka. Power gating with multiple sleep modes. In Proc. 7th Int. Symp. Quality Electronic Design ISQED '06, 2006. Google ScholarDigital Library
- K.-i. Kawasaki, T. Shiota, K. Nakayama, and A. Inoue. A sub-μs wake-up time power gating technique with bypass power line for rush current support. In Proc. IEEE Symp. VLSI Circuits, pages 146--147, 2008.Google Scholar
- Yiran Chen, Hai Li, K. Roy, and Cheng-Kok Koh. Gated decap: gate leakage control of on-chip decoupling capacitors in scaled technologies. In Proc. Custom Integrated Circuits Conf the IEEE 2005, pages 775--778, 2005.Google ScholarCross Ref
- M. S. Gupta, J. L. Oatley, R. Joseph, Gu-Yeon Wei, and D. M. Brooks. Understanding voltage variations in chip multiprocessors using a distributed power-delivery network. In Proc. Design, Automation & Test in Europe Conf. & Exhibition DATE '07, pages 1--6, 2007. Google ScholarDigital Library
- M. Popovich, M. Sotman, A. Kolodny, and E. G. Friedman. Effective radii of on-chip decoupling capacitors. 16(7):894--907, 2008. Google ScholarDigital Library
Index Terms
- Decoupling for power gating: sources of power noise and design strategies
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