skip to main content
10.1145/2039370.2039396acmconferencesArticle/Chapter ViewAbstractPublication PagesesweekConference Proceedingsconference-collections
research-article

Reliability analysis for MPSoCs with mixed-critical, hard real-time constraints

Authors Info & Claims
Published:09 October 2011Publication History

ABSTRACT

Methods such as rollback and modular redundancy are efficient to correct transient errors. In hard real-time systems, however, correction has a strong impact on response times, also on tasks that were not directly affected by errors. Due to deadline misses, these tasks eventually fail to provide correct service. In this paper we present a reliability analysis for periodic task sets and static priorities that includes realistic detection and roll-back scenarios and covers a hyperperiod instead of just a critical instant and therefore leads to much higher accuracy than previous approaches. The approach is compared with Monte-Carlo simulation to demonstrate the accuracy and with previous approaches covering critical instants to evaluate the improvements.

References

  1. T. Austin, D. Blaauw, T. Mudge, and K. Flautner. Making typical silicon matter with razor. IEEE Computer, 37(3):57--65, 2004. Google ScholarGoogle ScholarDigital LibraryDigital Library
  2. S. Baruah, H. Li, and L. Stougie. Towards the design of certifiable mixed-criticality systems. In Proc. of Real-Time and Embedded Technology and Applications Symp., pages 13--22. IEEE, 2010. Google ScholarGoogle ScholarDigital LibraryDigital Library
  3. S. Borkar. Designing reliable systems from unreliable components: the challenges of transistor variability and degradation. IEEE Micro, 25(6):10--16, 2005. Google ScholarGoogle ScholarDigital LibraryDigital Library
  4. I. Broster, A. Burns, and G. Rodríguez-Navas. Probabilistic analysis of CAN with faults. In Proc. of Real-Time Systems Symposium, pages 269--278. IEEE, 2002. Google ScholarGoogle ScholarDigital LibraryDigital Library
  5. A. Burns, R. Davis, and S. Punnekkat. Feasibility analysis of fault-tolerant real-time task sets. In Proc. of Euromicro Workshop Real-Time Systems, pages 29--33, 1996.Google ScholarGoogle ScholarCross RefCross Ref
  6. A. Burns, S. Punnekkat, L. Strigini, and D. R. Wright. Probabilistic scheduling guarantees for fault-tolerant real-time systems. In Proc. of Dependable Computing for Critical Applications, pages 361--378, 1999. Google ScholarGoogle ScholarDigital LibraryDigital Library
  7. D. Chabrol, C. Aussagues, and V. David. A spatial and temporal partitioning approach for dependable automotive systems. In Proc. of Emerging Technologies & Factory Automation, pages 1--8, 2009. Google ScholarGoogle ScholarDigital LibraryDigital Library
  8. M. Glass, M. Lukasiewycz, F. Reimann, C. Haubelt, and J. Teich. Symbolic reliability analysis and optimization of ECU networks. In Proc. of Design, Automation and Test in Europe, pages 158--163, 2008. Google ScholarGoogle ScholarDigital LibraryDigital Library
  9. International Electrotechnical Commission (IEC). Functional safety of electrical / electronic / programmable electronic safety-related systems, 1998.Google ScholarGoogle Scholar
  10. V. Izosimov, P. Pop, P. Eles, and Z. Peng. Synthesis of fault-tolerant embedded systems with checkpointing and replication. In Proc. of Int. Workshop Electronic Design, Test and Applications, 2006. Google ScholarGoogle ScholarDigital LibraryDigital Library
  11. H. Kopetz. Real-Time Systems: Design Principles for Distributed Embedded Applications. Kluwer Academic Publishers, Norwell, MA, USA, 1997. Google ScholarGoogle ScholarDigital LibraryDigital Library
  12. C. LaFrieda, E. Ipek, J. F. Martinez, and R. Manohar. Utilizing dynamically coupled cores to form a resilient chip multiprocessor. In Proc. of Int. Conf. Dependable Systems and Networks, pages 317--326, 2007. Google ScholarGoogle ScholarDigital LibraryDigital Library
  13. P. Pop, V. Izosimov, P. Eles, and Z. Peng. Design optimization of time- and cost-constrained fault-tolerant embedded systems with checkpointing and replication. IEEE Trans. on VLSI, 17(3):389--402, 2009. Google ScholarGoogle ScholarDigital LibraryDigital Library
  14. S. Punnekkat and A. Burns. Analysis of checkpointing for schedulability of real-time systems. In Proc. of Int. Workshop Real-Time Computing Systems and Applications, pages 198--205, 1997. Google ScholarGoogle ScholarDigital LibraryDigital Library
  15. M. Sebastian and R. Ernst. Reliability Analysis of Single Bus Communication with Real-Time Requirements. In Proc. of Pacific Rim Int. Symp. Dependable Computing, pages 3--10, 2009. Google ScholarGoogle ScholarDigital LibraryDigital Library
  16. J. C. Smolens, B. T. Gold, J. Kim, B. Falsafi, J. C. Hoe, and A. G. Nowatryk. Fingerprinting: bounding soft-error-detection latency and bandwidth. IEEE Micro, 24(6):22--29, 2004. Google ScholarGoogle ScholarDigital LibraryDigital Library
  17. D. J. Sorin, M. M. K. Martin, M. D. Hill, and D. A. Wood. Safetynet: improving the availability of shared memory multiprocessors with global checkpoint/recovery. In Proc. of Int. Computer Architecture Symp., pages 123--134, 2002. Google ScholarGoogle ScholarDigital LibraryDigital Library
  18. R. Teodorescu, J. Nakano, and J. Torrellas. Swich: A prototype for efficient cache-level checkpointing and rollback. IEEE Micro, 26(5):28--40, 2006. Google ScholarGoogle ScholarDigital LibraryDigital Library
  19. K. W. Tindell, A. Burns, and A. J. Wellings. An extendible approach for analyzing fixed priority hard real-time tasks. Real-Time Systems, 6(2):133--151, 1994. Google ScholarGoogle ScholarDigital LibraryDigital Library

Index Terms

  1. Reliability analysis for MPSoCs with mixed-critical, hard real-time constraints

        Recommendations

        Comments

        Login options

        Check if you have access through your login credentials or your institution to get full access on this article.

        Sign in
        • Published in

          cover image ACM Conferences
          CODES+ISSS '11: Proceedings of the seventh IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis
          October 2011
          402 pages
          ISBN:9781450307154
          DOI:10.1145/2039370

          Copyright © 2011 ACM

          Permission to make digital or hard copies of all or part of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, or republish, to post on servers or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from [email protected]

          Publisher

          Association for Computing Machinery

          New York, NY, United States

          Publication History

          • Published: 9 October 2011

          Permissions

          Request permissions about this article.

          Request Permissions

          Check for updates

          Qualifiers

          • research-article

          Acceptance Rates

          Overall Acceptance Rate280of864submissions,32%

          Upcoming Conference

          ESWEEK '24
          Twentieth Embedded Systems Week
          September 29 - October 4, 2024
          Raleigh , NC , USA

        PDF Format

        View or Download as a PDF file.

        PDF

        eReader

        View online with eReader.

        eReader