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abstract

SkipCache: miss-rate aware cache management

Published:19 September 2012Publication History

ABSTRACT

It is common for computers to have multi-level caches. This piece of work revolves around one question: Are all levels needed by all applications during all phases of their execution?, especially in the multi programmed scenario where giving the entire cache to one application and depriving the other might actually increase the performance.

References

  1. G. Memik et al. Just Say No: Benefits of Early Cache Miss Determination. In HPCA, 2003. Google ScholarGoogle ScholarDigital LibraryDigital Library
  2. A. Jaleel et al. High performance cache replacement using re-reference interval prediction (RRIP). In ISCA, 2010. Google ScholarGoogle ScholarDigital LibraryDigital Library
  3. M. Hayenga et al. MadCache: A PC-aware cache insertion policy. In JWAC, 2010.Google ScholarGoogle Scholar
  4. Y. Xie et al. Scalable shared-cache management by containing thrashing workloads. In HiPEAC, 2010. Google ScholarGoogle ScholarDigital LibraryDigital Library

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  1. SkipCache: miss-rate aware cache management

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    • Published in

      cover image ACM Conferences
      PACT '12: Proceedings of the 21st international conference on Parallel architectures and compilation techniques
      September 2012
      512 pages
      ISBN:9781450311823
      DOI:10.1145/2370816

      Copyright © 2012 Authors

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      Association for Computing Machinery

      New York, NY, United States

      Publication History

      • Published: 19 September 2012

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      Overall Acceptance Rate121of471submissions,26%

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