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Lifetime reliability assessment with aging information from low-level sensors

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Published:02 May 2013Publication History

ABSTRACT

Aggressive technology scaling has led Integrated Circuits (ICs) suffer from ever-increasing wearout effects. As a consequence, Dynamic Reliability Management (DRM) becomes an essential approach to assure IC's lifetime reliability. Accurate and efficient reliability modeling from low-level aging sensor measurements is critical to DRM systems. This work presents a Time-Sharing Sensing (TSS) method for $V_{th}$-sensor based DRM to assess the dynamic NBTI-induced degradation experienced by the circuit under monitoring. SPICE simulation results suggest that the proposed TSS method can accurately capture the circuit reliability status under random stress conditions.

References

  1. Predictive Technology Model (PTM). http://ptm.asu.edu/.Google ScholarGoogle Scholar
  2. S. Bhardwaj, W. Wang, R. Vattikonda, Y. Cao, and S. Vrudhula. Predictive Modeling of the NBTI Effect for Reliable Design. In Proceedings of Custom Integrated Circuits Conference, pages 189--192, 2006.Google ScholarGoogle Scholar
  3. J. W. McPherson. Reliability Challenges for 45nm and Beyond. In Design Automation Conference, pages 176--181, 2006. Google ScholarGoogle ScholarDigital LibraryDigital Library
  4. T. Sakurai and A. Newton. Alpha-Power Law MOSFET Model and Its Applications to CMOS Inverter Delay and Other Formulas. IEEE Journal of Solid-State Circuits, 25(2):584--594, 1990.Google ScholarGoogle ScholarCross RefCross Ref
  5. J. Srinivasan, S. Adve, P. Bose, and J. Rivers. The Case for Lifetime Reliability-Aware Microprocessors. In Proceedings of International Symposium on Computer Architecture, pages 276--287, 2004. Google ScholarGoogle ScholarDigital LibraryDigital Library
  6. R. Teodorescu and J. Torrellas. Variation-Aware Application Scheduling and Power Management for Chip Multiprocessors. In Proceedings of International Symposium on Computer Architecture, pages 363--374, 2008. Google ScholarGoogle ScholarDigital LibraryDigital Library

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        cover image ACM Conferences
        GLSVLSI '13: Proceedings of the 23rd ACM international conference on Great lakes symposium on VLSI
        May 2013
        368 pages
        ISBN:9781450320320
        DOI:10.1145/2483028

        Copyright © 2013 Authors

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        Association for Computing Machinery

        New York, NY, United States

        Publication History

        • Published: 2 May 2013

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        GLSVLSI '13 Paper Acceptance Rate76of238submissions,32%Overall Acceptance Rate312of1,156submissions,27%

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