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Thermal-aware energy minimization for real-time scheduling on multi-core systems

Published:01 July 2013Publication History
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Abstract

With exponentially increased transistor density on multi-core platforms, the power explosion and consequently soaring chip temperature have become critical challenges for system designers. Moreover, the increasing chip temperature results in higher leakage power, hence further aggravates the increment of the overall power consumption [1]. Thus, the dramatically growing power/energy consumption and chip temperature severely affect the cost, reliability and performance of the systems [4].

References

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  2. G. Quan and Y. Zhang. Leakage aware feasibility analysis for temperature-constrained hard real-time periodic tasks. In Real-Time Systems, 2009. ECRTS '09. 21st Euromicro Conference on, pages 207--216, Jul. 2009. Google ScholarGoogle ScholarDigital LibraryDigital Library
  3. S. Sharifi, R. Ayoub, and T. Rosing. Tempomp: Integrated prediction and management of temperature in heterogeneous mpsocs. In Design, Automation Test in Europe Conference Exhibition (DATE), pages 593--598, Mar. 2012. Google ScholarGoogle ScholarDigital LibraryDigital Library
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  • Published in

    cover image ACM SIGBED Review
    ACM SIGBED Review  Volume 10, Issue 2
    Special Issue on the Work-in-Progress (WiP) session of the 33rd IEEE Real-Time Systems Symposium (RTSS'12)
    July 2013
    30 pages
    EISSN:1551-3688
    DOI:10.1145/2518148
    Issue’s Table of Contents

    Copyright © 2013 Authors

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    Association for Computing Machinery

    New York, NY, United States

    Publication History

    • Published: 1 July 2013

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